The present invention relates to solid state display panels. A wide variety of solid state or flat panel display devices have been proposed in recent times including the use of large scale integrated circuitry using silicon chips to actuate and control a liquid crystal display medium, as well as thin film transistorized display panels which drive electroluminescent display medium. An electroluminescent display panel composed of an X-Y array of display elements upon a planar insulating substrate, with integral thin film transistor circuit control elements, is described in U.S. Pat. No. 4,006,383, owned by the assignee of the present invention.
Solid state display panels are desired as a replacement for conventional cathode ray tube display means because of the rugged, compact design of the low power requirements projected for such solid state display devices. A particular application for such flat panel displays is for alphanumeric displays. A competitive alphanumeric display system utilizes a gaseous discharge display panel, and a modularized gas discharge panel is described in U.S. Pat. No. 3,996,490. For alphanumeric display usage the display elements are arrayed in an X-Y array, which typically utilizes a conventional alphanumeric format with five horizontally disposed display elements and seven vertically disposed display elements comprising a single alphanumeric character. A plurality of rows and columns of such 5.times. 7 display alphanumeric characters are arrayed upon the display module or display panel.
In order to reduce the cost of fabrication of such display panels it is desired that the panel be constructed from identical modules which can be abutted together to form the entire display panel. A significant cost saving results from the reduced vacuum system and mask system size requirements, which can be greatly reduced when a relatively small module size compared to the total display size is used. The particular problem to which the present invention is directed is that when using a thin film transistor control circuit as set forth in the above-referred to U.S. Pat. No. 4,006,383, the display medium electrode which occupies a substantial portion of the total layout area of a unit cell is typically not symmetrically disposed within the unit display cell. The unit display cell is defined typically by the intersection of the adjacent X-Y buses which interconnect the display elements upon the panel and permit peripheral connection to drive and control circuitry. The thin film transistor control circuit which has been found particularly useful two transistors and a storage capacitor connected between the respective X-Y buses which define or relate to a specific unit cell. The information signal is stored on the storage capacitor and used to control the voltage which appears across the electrode pad and a light transmissive cover electrode which covers the entire display panel. The layout of the thin film transistors, the storage capacitor and the display medium electrode pad is such that it is virtually impossible to center the display medium electrode pad within a unit cell layout. Thus, when one fabricates a display module with the display medium electrode offset from the unit cell symmetry, it is not possible to abut the identical modules to form the entire display panel, and to at the same time align the display elements in both type X and Y directions, so that the entire abutted display panel has symmetrically disposed display elements.